The present invention relates generally to the design of digital logic circuits and in particular it provides the basis for a new family of logic circuits which operate upon current signals rather than voltage signals. Logic circuits according to the invention may be designed to perform binary and higher order multiple-valued logic functions.
Binary logic circuits are the basis of present-day digital computing. There are many competing families of such circuits. Most use voltage levels (as distinct from current levels) at the input and output to describe the operation of the circuit. Such families include ECL (Emitter - Coupled Logic), TTL (Transistor - Transistor Logic), I.sup.2 L (Integrated - Injection Logic), NMOS (N-channel MOS) and CMOS (complementary MOS). These families have been listed in a rough order of power consumption and speed, with ECL consuming most power but also operating at the highest speed.
References to prior art logic families are available in S. M. Sze (ed.), "VLS1 Technology", New York: McGraw-Hill, 1983 and W. P. M. Solomon, "A Comparison of Semiconductor Devices for High-Speed Logic", Proc. IEEE, Volume 70, 1982, pages 489-509. References to both prior art logic families and to multi-valued logic and its implementation may be found in Stanley L. Hurst, "Multiple-Valued Logic--Its Status and Its Future", IEEE Transactions on Computers, Vol. C-33, No. 12, December 1984, pages 1160 to 1179.